Abstract: This paper presents the design, functional verification, and synthesis-level evaluation of a pipelined IEEE-754 single-precision floating-point multiplier, optimized for real-time digital ...
Abstract: In the IEEE-754 standard for floating point arithmetic, multipliers with size 24-bits (single precision), 53-bits (double precision)), and 113-bits (quadruple precision) are required. LUTs ...
Some results have been hidden because they may be inaccessible to you
Show inaccessible results
Feedback